patch-2.1.79 linux/arch/sparc64/kernel/itlb_miss.S

• Lines: 21
• Date: Mon Jan 12 15:15:44 1998
• Orig file: v2.1.78/linux/arch/sparc64/kernel/itlb_miss.S
• Orig date: Mon Apr 14 16:28:09 1997

diff -u --recursive --new-file v2.1.78/linux/arch/sparc64/kernel/itlb_miss.S linux/arch/sparc64/kernel/itlb_miss.S
@@ -1,4 +1,4 @@
-/* $Id: itlb_miss.S,v 1.10 1997/03/26 12:24:18 davem Exp $
+/* $Id: itlb_miss.S,v 1.11 1997/10/14 01:48:25 davem Exp $
  * itlb_miss.S:	Instruction TLB miss code, this is included directly
  *              into the trap table.
  *
@@ -23,10 +23,10 @@
   /*0x24*/	srlx		%g1, 1, %g1				! PTE offset
   /*0x28*/	ldxa		[%g5 + %g4] ASI_PHYS_USE_EC, %g3	! Load PMD
 2:/*0x2c*/	ldxa		[%g3 + %g1] ASI_PHYS_USE_EC, %g5	! Load PTE
-  /*0x30*/	brlz,a,pt	%g5, 1f					! Valid set?
-  /*0x34*/	 stxa		%g5, [%g0] ASI_ITLB_DATA_IN		! TLB load
-  /*0x38*/	ba,a,pt		%xcc, sparc64_itlb_refbit_catch		! Nope...
-1:/*0x3c*/	retry							! Trap return
+  /*0x30*/	brgez,pn	%g5, sparc64_itlb_refbit_catch		! Valid set?
+  /*0x34*/	 nop							! delay
+  /*0x38*/	stxa		%g5, [%g0] ASI_ITLB_DATA_IN		! TLB load
+  /*0x3c*/	retry							! Trap return
 
 3:				/* ICACHE line 3 */
   /*0x40*/	ldxa		[%g6 + %g3] ASI_PHYS_USE_EC, %g5	! Load kern PGD