patch-2.1.121 linux/include/asm-alpha/core_pyxis.h

• Lines: 53
• Date: Sun Sep 6 10:34:33 1998
• Orig file: v2.1.120/linux/include/asm-alpha/core_pyxis.h
• Orig date: Tue Aug 18 22:02:06 1998

diff -u --recursive --new-file v2.1.120/linux/include/asm-alpha/core_pyxis.h linux/include/asm-alpha/core_pyxis.h
@@ -182,6 +182,7 @@
 #define PYXIS_RT_COUNT			(IDENT_ADDR + 0x87A0000200UL)
 #define PYXIS_INT_TIME			(IDENT_ADDR + 0x87A0000240UL)
 #define PYXIS_IIC_CTRL			(IDENT_ADDR + 0x87A00002C0UL)
+#define PYXIS_RESET			(IDENT_ADDR + 0x8780000900UL)
 
 /*
  * Bit definitions for I/O Controller status register 0:
@@ -258,18 +259,6 @@
  * a kernel virtual address and vv.
  */
 
-/* Ruffian doesn't do 1G PCI window */
-
-static inline unsigned long pyxis_ruffian_virt_to_bus(void * address)
-{
-	return virt_to_phys(address);
-}
-
-static inline void * pyxis_ruffian_bus_to_virt(unsigned long address)
-{
-	return phys_to_virt(address);
-}
-
 __EXTERN_INLINE unsigned long pyxis_virt_to_bus(void * address)
 {
 	return virt_to_phys(address) + PYXIS_DMA_WIN_BASE;
@@ -600,15 +589,10 @@
 
 #ifdef __WANT_IO_DEF
 
-#ifdef CONFIG_ALPHA_RUFFIAN
-#define virt_to_bus	pyxis_ruffian_virt_to_bus
-#define bus_to_virt	pyxis_ruffian_bus_to_virt
-#else
 #define virt_to_bus	pyxis_virt_to_bus
 #define bus_to_virt	pyxis_bus_to_virt
-#endif
 
-#ifdef BWIO_ENABLED
+#if defined(BWIO_ENABLED) && !defined(CONFIG_ALPHA_RUFFIAN)
 # define __inb		pyxis_bw_inb
 # define __inw		pyxis_bw_inw
 # define __inl		pyxis_bw_inl
@@ -649,7 +633,7 @@
 
 #define dense_mem	pyxis_dense_mem
 
-#ifdef BWIO_ENABLED
+#if defined(BWIO_ENABLED) && !defined(CONFIG_ALPHA_RUFFIAN)
 # define inb(port) __inb((port))
 # define inw(port) __inw((port))
 # define inl(port) __inl((port))